Advanced microprocessors require several (e.g., eight or more) levels of wiring in addition to the transistor gate level. Each wiring level is stacked over the previous level with connections to the levels above and below made through via layers. The dual damascene approach to fabricating these interconnected structures creates a wiring level and a via/contact level simultaneously, and thereby reduces the total number of processing steps. A damascene approach is a necessity when copper is the conductor metal because there are no effective plasma etch processes available for copper. By patterning two layers and then filling both with metal, the dual damascene approach, of which there are several variations, reduces the total number of process steps; however, this method still requires around twenty process steps per wiring layer.
The basic step-and-flash imprint lithography (SFIL) process uses a photocurable imprint resist which is dispensed as a monomeric liquid and is cured while in contact with the template (Colburn, M.; Johnson, S.; Stewart, M.; Damle, S.; Bailey, T. C.; Choi, B.; Wedlake, M.; Michaelson, T.; Sreenivasan, S. V.; Ekerdt, J.; Willson, C. G., Proc. SPIE-Int. Soc. Opt. Eng. 1999, 3676, 379). The role of the imprint resist is only to act as an etch mask or barrier for transfer of the imprinted pattern into an underlying “transfer layer.” This imprint resist, or etch barrier, serves the same purpose as photoresist in a traditional photolithographic process. After the printed pattern is transferred to the substrate, any remaining resist is usually removed or stripped. Imprint resists can be used like traditional photoresists to serve as a masking layer, but since the imprint process directly generates topography, it potentially simplifies the process of creating a “functional” material that could serve as part of the final device or the device itself. For example, nanoimprint techniques can be used to make diffractive optical elements (Li, M.; Wang, J.; Zhuang, L.; Chou, S. Y., Appl. Phys. Lett. 2000, 76, 673; Seekamp, J.; Zankovych, S.; Helfer, A. H.; Maury, P.; Sotomayor-Torres, C. M.; Boettger, G.; Liguda, C; Eich, M.; Heidari, B.; Montelius, L.; Ahopelto, J. Nanotechnology 2002, 13, 581-586; Yu, Z.; Wu, W.; Chen, L.; Chou, S. Y., J. Vac. Sci. Technol. B 2001, 19, 2816) or directly pattern channels for microfluidic devices (Rolland, J. P.; Van Dam, R. M.; Schorzman, D. A.; Quake, S. R.; DeSimone, J. M., J. Am. Chem. Soc. 2004, 126, 2322-2323). An imprintable conductive material would allow the direct patterning of wiring circuits; conversely, the ability to pattern an insulator or dielectric material would provide a good starting point for a damascene-like process. As SFIL lithography technology matures, a broader set of imprint materials is becoming available, and many of these uses are being developed.
As a result of the foregoing, a method of combining SFIL with a damascene process to make multi-tiered structures for a multi-level device would be very attractive, particularly from an economic standpoint.